Redirect in corso... Publications on International Journals: [J1] F. Busato, N. Bombieri. “A dynamic approach for workload partitioning on GPU architectures”. In IEEE Transactions on Parallel and Distributed Systems, 2016, vol.28(6): 1535-1549. DOI: 10.1109/TPDS.2016.2631166. [J2] F.Bistaffa, N. Bombieri, A. Farinelli. “An Efficient Approach for Accelerating Bucket Elimination on GPUs”. In IEEE Transactions on Cybernetics, 2016, vol.47(11): 3967-3979. DOI: 10.1109-TCYB.2016.2593773. [J3] N. Bombieri, F. Busato, F. Fummi. “Pro++: A Profiling Framework for Primitive-based GPU Programming”. To appear in IEEE Transactions on Emerging Topics in Computing, 2016. DOI: 10.1109-TETC-2016-2546554. [J4] V. Bonnici, F. Busato, G. Micale, N. Bombieri, A. Pulvirenti, R. Giugno. “APPAGATO: an APproximate PArallel and stochastic GrAph querying TOol for biological networks”. Bioinformatics, 2016, vol.32(14):2159-66. [J5] N. Bombieri, D. Drogoudis, G. Gangemi, R. Gillon, M. Grosso, E. Macii, M. Poncino, S. Rinaudo. “Addressing the Smart Systems Design Challenge: The SMAC Platform”. Microprocessors and Microsystems. vol. 39, n.8, 2015, pp. 1158-1173. [J6] F. Busato, N. Bombieri. “An Efficient Implementation of the Bellman-Ford algorithm for Kepler GPU Architectures”. IEEE Transactions on Parallel and Distributed Systems, vol. 27, n.8, pp. 2222-2233, 2016. [J7] N. Bombieri, F. Fummi, S. Vinco. “A Methodology to Recover RTL IP Functionality for Automatic Generation of SW Applications”. ACM Transactions on Design Automation of Electronic Systems. vol. 20 n.3, 2015, pp. 1-25, 2015. [J8] F. Busato, N. Bombieri. “BFS-4K: an Efficient Implementation of BFS for Kepler GPU Architectures”. IEEE Transactions on Parallel and Distributed Systems. vol. 26, n.7, pp. 1826-1838, 2015. [J9] N. Bombieri, F. Fummi, V. Guarnieri, G. Pravadelli, F. Stefanni, T. Ghasempouri, M. Lora, G. Auditore, M. Negro-Marcigaglia. “Reusing RTL assertion checkers for verification of SystemC TLM models”. Journal of Electronic Testing: Theory and Applications, vol. 31, n.2, 2015, pp. 167-80. [J10] V. Bonnici, F. Russo, N. Bombieri, A. Pulvirenti, R. Giugno. “Comprehensive reconstruction and visualization of non-coding regulatory networks in human”. Frontiers in Bioengineering and Biotechnology. vol. 69, n. 2, 2014, pp. 1-22. [J11] N. Bombieri; F. Fummi; V. Guarnieri, G. Pravadelli. “Testbench qualification of SystemC TLM protocols through Mutation Analysis”. IEEE Transactions on Computers. vol. 63, n. 5, 2014, pp. 1248-1261. [J12] R. Giugno, V. Bonnici, N. Bombieri, A.Pulvirenti, A.Ferro, D. Shasha. “GRAPES: a Software for Parallel Searching on Biological Graphs targeting Multi-core Architectures” PLoS ONE, vol. 8, n. 10, 2013, pp. 1-17. [J13] N. Bombieri, E.S.M. Ebeid, F. Fummi, M. Lora. “On the Reuse of Heterogeneous IPs into SysML Models for Integration Validation”. Journal of Electronic Testing: Theory and Applications. vol. 29, n.5, 2013, pp. 1-20 [J14] A. Acquaviva, N. Bombieri, F. Fummi, S. Vinco. “Semi-Automatic Generation of Device Drivers for Rapid Embedded Platform Development”. IEEE Transactions on CAD/ICAS. vol. 32, n. 9, 2013, pp. 1293-1306. [J15] N. Bombieri, F. Fummi, V. Guarnieri. “FAST: An RTL Fault Simulation Framework based on RTL-to-TLM Abstraction”. Journal of Electronic Testing: Theory and Applications. vol. 28, n. 4, 2012, pp. 495-510. [J16] N. Bombieri, F. Fummi, V. Guarnieri, F. Stefanni, S. Vinco. “HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels”. International Journal on Design Automation for Embedded Systems, vol. 16(2), 2012, pp.115-135. [J17] Guarnieri V. Di Guglielmo G., Bombieri N., Pravadelli G., Fummi, F, Hantson H., Raik J., Jenihhin M., Ubar R. “On the Reuse of TLM Mutation Analysis at RTL”. Journal of Electronic Testing: Theory and Applications, vol. 28, n. 4, 2012 , pp. 435-448. [J18] N. Bombieri, F. Fummi, G. Pravadelli. “Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions”. IEEE Transactions on Computers. vol. 60, n. 12, 2011, pp. 1730-1743. [J19] N. Bombieri, M. Ferrari, F. Fummi, G. Di Guglielmo, G. Pravadelli, F. Stefanni, A. Venturelli. “HIFSuite: Tools for HDL Code Conversion and Manipulation «EURASIP Journal on Embedded Systems. vol. 2010 , n. 436328 , 2010 , pp. 1-20. [J20] N. Bombieri, F. Fummi, D. Quaglia. “System/Network Design Space Exploration based on TLM for Networked Embedded Systems” ACM Transactions on Embedded Computing Systems. vol. 9, n. 4, 2010, pp. 37:1-37:32. [J21] N. Bombieri, F. Fummi, G. Pravadelli. “Reuse and Optimization of Testbenches and Properties in a TLM-to-RTL Design Flow”. ACM Transactions on Design Automation of Electronic Systems. vol. 13, n. 3, 2008, pp. 47:1-47:22. [J22] N. Bombieri, A. Fedeli, F. Fummi, G. Pravadelli. “Hybrid Incremental Assertion-Based Verification for Functional Validation in TLM Design Flows”. IEEE Design &Test of Computers. vol. 24, n. 2, 2007, pp. 140-152. Publications on International Conferences: [C1] R. Distefano, N. Goncharenko, F.Fummi, R. Giugno, G. Bader, N. Bombieri. “SyQUAL: A platform for qualitative modelling and simulation of biological systems”. In Proc. of IEEE International High-Level Design Validation and Test Workshop (HLDVT), Santa Cruz, CA-USA, October 7-8, 2016, pp.1-8. [C2] N. Bombieri, F. Busato, F. Fummi, A Fine-grained Performance Model for GPU Architectures. In Proc. of ACM/IEEE Design, Automation and Test in Europe (DATE), Dresden, Germany, 14-18 March, 2016, pp.1-6. [C3] D. Coati, R. Distefano, N. Bombieri, F. Fummi, M. Mirenda, C. Laudanna, R. Giugno, A SystemC-based Platform for Assertion-based Verification and Mutation Analysis in Systems Biology. In Proc. of IEEE Latin-American Test Symposium (LATS), Foz do Iguacu, Brazil, 6-8 April, 2016, pp. 1-6. [C4] Bombieri, Nicola; Busato, Federico; Fummi, Franco; Scala, Michele: MIPP: A Microbenchmark Suite for Performance, Power, and Energy Consumption Characterization of GPU architectures. In Proc. of IEEE International Symposium on Industrial Embedded Systems. Krakow (Poland), 23-25 May 2016. pp 1-6. [C5] S. Aldegheri, J. Barnat, N. Bombieri, F. Busato, M. Cˇeˇska, Milan. Parametric Multi-Step Scheme for GPU-Accelerated Graph Decomposition into Strongly Connected Components. In Proc. of EURO-Par PELGA 2016. Grenoblw (France) 22-26 August. Pp 1-12. [C6] Bistaffa, Filippo; Bombieri, Nicola; Farinelli, Alessandro: CUBE: A CUDA approach for Bucket Elimination on GPUs. In Proc. of European Conference on Artificial Intelligence (ECAI). The Hague, Hollande, 29 Aug-2 Sept. 2016. [C7] N. Bombieri, F. Busato; A. Danese; L. Piccolboni; G. Pravadelli, Exploiting GPU Architectures for Dynamic Invariant Mining. In Proceedings of "IEEE International Conference on Computer Design (ICCD)", New York City, NY- USA, October 18-21, 2015, pp. 1-4. [C8] F. Busato, N. Bombieri. On the Load Balancing Techniques for GPU Applications Based on Prefix-scan.  In Proceedings of "IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-15)", Turin, Italy, September, 23-25, 2015, pp. 1-8. [C9] N. Bombieri, F. Busato, F.Fummi. An Enhanced Profiling Framework for the Analysis and Development of Parallel Primitives for GPUs. In Proceedings of "IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-15)", Turin, Italy, September, 23-25, 2015, pp. 1-8. [C10] R. Distefano, F. Fummi, C. Laudanna, N. Bombieri, R. Giugno, A SystemC Platform for Signal Transduction Modelling and Simulation in Systems Biology. In Proceedings of "ACM Great lakes symposium on VLSI (GLSVLSI)", Pittsburgh, Pennsylvania, USA, May 20-22, 2015, pp. 1-4. [C11] N. Bombieri, Riccardo Filippozzi, G. Pravadelli, F. Stefanni, RTL property abstraction for TLM assertion-based verification. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)" , Grenoble (France) , 9-13 March , 2015 , pp. 1-6. [C12] V. Guarnieri, M. Petricca, A. Sassone, S. Vinco, N. Bombieri, F. Fummi, E. Macii, M. Poncino, A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Dresden, Germany, 24-28 March, 2014, pp. 1-6. [C13] N. Bombieri, R. Distefano, G. Scardoni, F. Fummi, C. Laudanna, R. Giugno, Dynamic modeling and simulation of leukocyte integrin activation through an electronic design automation framework. In Proceedings of "Conference on Computational Methods in Systems Biology (CMSB)", Manchester, UK, 17-19 November, 2014 , pp. 1-12. [C14] N. Bombieri, F. Fummi, V. Guarnieri, G. Pravadelli, F. Stefanni, T. Ghasempouri, M. Lora, G. Auditore, M. Negro-Marcigaglia, On the Reuse of RTL assertions in Systemc TLM Verification. In Proceedings of "IEEE Latin-American Test Workshop (LATW)", Fortaleza, Brasil, 12-15 March, 2014, pp. 1-6. [C15] F. Bistaffa, A. Farinelli, N. Bombieri, Optimising Memory Management for Belief Propagation in Junction Trees using GPGPUs. In Proceedings of "IEEE International Conference on Parallel and Distributed Systems (ICPADS)", Hsinchu, Taiwan, 16-19 December, 2014, pp. 1-8. [C16] N. Bombieri, H.-Y. Liu, F. Fummi, L. Carloni, A Method to Abstract RTL IP Blocks into C++ Code and Enable High-Level Synthesis. In Proceedings of "ACM/IEEE Design Automation Conference (DAC)", Austin, TX, USA, 2-6 June, 2013, pp. 1-9. [C17] N. Bombieri, F. Fummi, S. Vinco, On the Automatic Generation of GPU‐oriented Software Applications from RTL IPs. In Proceedings of "ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)", Montreal, Canada, Sept 29 - Oct 04, 2013, pp. 1-10. [C18] N. Bombieri, E.S. Ebeid, F. Fummi, M. Lora, On the reuse of RTL IPs for SysML model generation. In Proceedings of "IEEE International Workshop on Microprocessor Test and Verification (MTV)", Austin, TX, USA, 10–12 December, 2013, pp. 54-59. [C19] V. Bertacco, D. Chatterjee, N. Bombieri, F. Fummi, S. Vinco, A. M. Kaushik, H. D. Patel, On the Use of GP-GPUs for Accelerating Compute-intensive EDA Applications. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Grenoble, France, 18-22 March, 2013, pp. 1357-1366. [C20] N. Bombieri, D. Forrini, F. Fummi, M. Laurenzi, S. Vinco, RTL IP abstraction into optimized embedded software. In Proceedings of "IEEE East-West Design & Test Symposium (EWDTS)", Rostov-on-Don (Russia), 27-30 Sept. 2013, 2013, pp. 1-5. [C21] N. Bombieri, D. Drogoudis, G. Gangemi, R. Gillon, E. Macii, M. Poncino, S. Rinaudo, F. Stefanni, D. Trachanis, M. van Helvoort, SMAC: Smart Systems Co-Design. In Proceedings of "IEEE EUROMICRO DSD/SEAA", Santander, Spain, 4-6 September, 2013, pp. 1-7. [C22] N. Bombieri, F. Fummi, V. Guarnieri, A. Acquaviva, Energy Aware TLM Platform Simulation via RTL Abstraction. In Proceedings of "IEEE International High Level Design Validation and Test Workshop (HLDVT)", Huntington Beach, CA, USA, 9-10 November, 2012, pp. 156-163. [C23] N. Bombieri, F. Fummi, V. Guarnieri, FAST-GP: An RTL Functional Verification Framework based on Fault Simulation on GP-GPUs. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Dresden, Germany, 12-16 March, 2012, pp. 562-565. [C24] D. Lorenz, K. Grüttner, N. Bombieri, V. Guarnieri, S. Bocchio, From RTL IP to functional system-level models with extra-functional properties. In Proceedings of "ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)", Tampere, Finland, 7-12 October, 2012, pp. 547-556. [C25] A. Acquaviva, N. Bombieri, F. Fummi, S. Vinco, On the automatic synthesis of parallel SW from RTL models of hardware IPs. In Proceedings of "ACM Great lakes symposium on VLSI (GLSVLSI)", Salt Lake City, UT, USA, 3-4 May, 2012, pp. 71-74. [C26] N. Bombieri, F. Fummi, V. Guarnieri, G. Pravadelli, S. Vinco, Redesign and Verification of RTL IPs through RTL-to-TLM Abstraction and TLM Synthesis. In Proceedings of "IEEE International Workshop on Microprocessor Test and Verification (MTV)", Austin, TX, USA, 10-12 December, 2012, pp. 76-81. [C27] N. Bombieri, S. Vinco, V. Bertacco, D. Chatterje, SystemC simulation on GP-GPUs: CUDA vs. OpenCL  in  Proceedings of "ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES)", Tampere, Finland, 7-12 October 2012, pp. 343-352 [C28] N. Bombieri, F. Fummi, V. Guarnieri, Accelerating RTL Fault Simulation through RTL-to-TLM Abstraction. In Proceedings of "IEEE European Test Symposium (ETS)", Trondheim, Norway, 23-27 May, 2011, pp. 117-122. [C29] N. Bombieri, F. Fummi, D. Quaglia, S. Vinco, Automatic interface generation for component reuse in HW-SW partitioning. In Proceedings of "IEEE EUROMICRO Conference on Digital System Design (DSD)", Oulu, Finland, August 31 - September 2, 2011, pp. 793-796. [C30] N. Bombieri, F. Fummi, V. Guarnieri, F. Stefanni, S. Vinco, Efficient Implementation and Abstraction of SystemC Data Types for Fast Simulation. In Proceedings of "IEEE Forum for Design Languages (FDL)", Oldenburg, Germany, 13-15 September, 2011, pp. 142-148. [C31] V. Guarnieri, N. Bombieri, G. Pravadelli, F. Fummi, H. Hantson, J. Raik, M. Jenihhin, R. Ubar, Mutation Analysis for SystemC Designs at TLM. In Proceedings of "IEEE Latin-American Test Workshop (LATW)", Porto de Galinhas (PE), Brazil, March, 27-30, 2011, pp. 1-6. [C32] N. Bombieri, F. Fummi, G. Pravadelli, Abstraction of RTL IPs into Embedded Software. In ACM/IEEE Design Automation Conference (DAC), in Proceedings of "ACM/IEEE Design Automation Conference (DAC)", Anaheim, CA, USA, 13-18 June, 2010, pp. 24-29. [C33] N. Bombieri, F. Fummi, V. Guarnieri, Automatic Synthesis of OSCI TLM-2.0 Models into RTL Bus-based IPs. In Proceedings of "IEEE International High Level Design Validation and Test Workshop (HLDVT)", Anaheim, CA, USA, 11-12 June, 2010, pp. 105-112. [C34] N. Bombieri, G. Di Guglielmo, L. Di Guglielmo, M. Ferrari, F. Fummi, G. Pravadelli, F. Stefanni, A. Venturelli, HIFSuite: Tools for HDL Code Conversion and Manipulation. In Proceedings of "IEEE International High Level Design Validation and Test Workshop", Anaheim Convention Center, Anaheim, CA, June 11-12, 2010, pp. 40-41. [C35] N. Bombieri, F. Fummi, V. Guarnieri, Model Checking on TLM-2.0 IPs through automatic TLM-to-RTL synthesis. In Proceedings of "IEEE International Conference on VLSI and System-on-Chip (VLSI-SoC)", Madrid, Spain, 27-29 September, 2010, pp. 61-66. [C36] A. Acquaviva, N. Bombieri, F. Fummi, S. Vinco, Automatic Customization of Device Drivers for IP-cores Used with Assorted CPU Organizations. In Proceedings of "ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)", Grenoble, France, 11-16 October, 2009, pp. 173-182. [C37] N. Bombieri, F. Fummi, G. Pravadelli, S. Vinco, Correct-by-construction generation of device drivers based on RTL testbenches. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Nice, France, 20-24 April, 2009, pp. 1500-1505. [C38] N. Bombieri, F. Fummi, G. Pravadelli, M. Hampton, F. Letombe, Functional qualification of TLM verification. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Nice, France, 20-24 April, 2009, pp. 190-195. [C39] N. Bombieri, F. Fummi, G. Pravadelli, On the Mutation Analysis of SystemC TLM-2.0 Standard. In Proceedings of "IEEE International Workshop on Microprocessor Test and Verification (MTV)", Austin, TX, USA, 7-9 December, 2009, pp. 32-37. [C40] N. Bombieri, F. Fummi, G. Pravadelli, A Mutation Model for the SystemC TLM 2.0 Communication Interfaces. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Munich, Germany, 10-14 March, 2008, pp. 396-401. [C41] N. Bombieri, N. Deganello, F. Fummi, Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Munich, Germany, 10-14 March, 2008, pp. 15-20. [C42] N. Bombieri, F. Fummi, G. Pravadelli, RTL-TLM Equivalence Checking Based on Simulation. In Proceedings of "IEEE East-West Design & Test Symposium (EWDTS)", Lviv, Ukraine, October 9-13, 2008, pp. 214-217. [C43] N. Bombieri, F. Fummi, Automatic Transactor Generation in TLM by Exploiting EFSMs. In Proceedings of "Design & Verification Conference & Exhibition (DVCon)", San Jose, CA, USA, 21-23 February, 2007, pp. 151-158. [C44] N. Bombieri, F. Fummi, G. Pravadelli, Incremental ABV for Functional Validation of TL-to-RTL Design Refinement. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Acropolis, Nice, France, 16-20 April, 2007, pp. 882-887. [C45] N. Bombieri, F. Fummi, J.P. Marques-Silva, G. Pravadelli, Towards Equivalence Checking Between TLM and RTL Models. In Proceedings of "ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE)", Nice, France, 30 May - 1 June, 2007, pp. 113-122. [C46] N. Bombieri, F. Fummi, G. Pravadelli, A Methodology for Abstracting RTL Designs into TL Descriptions. In Proceedings of "ACM/IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE)", Napa Valley, CA, USA, 27-29 July, 2006, pp. 103-112. [C47] N. Bombieri, F. Fummi, G. Pravadelli, A TLM Design for Verification Methodology  in IEEE Ph.D. Research. In Proceedings of "IEEE Ph.D. Research in Microelectronics and Electronics (PRIME)", Otranto (LE), Italy, 12-15 June, 2006, pp. 337-340. [C48] N. Bombieri, F. Fummi, G. Pravadelli, Incremental ABV for TL-to-RTL Design Refinement. In Proceedings of "IEEE East-West Design & Test International Workshop (EWDTW)", Sochi (Russia), September 15-19, 2006, pp. 100-107. [C49] N. Bombieri, A. Fedeli, F. Fummi, On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling. In Proceedings of "IEEE International Workshop on Microprocessor Test and Verification (MTV)", Austin, TX, USA, 3-4 Nov. 2006, pp. 127-132. [C50] N. Bombieri, F. Fummi, On the Automatic Transactor Generation in TLM-based Design Flows. In Proceedings of "IEEE International High Level Design Validation and Test Workshop (HLDVT)", Monterey, CA, USA, 8-10 November, 2006, pp. 85-92. [C51] N. Bombieri, F. Fummi, G. Pravadelli, On the Evaluation of Transactor-based Verification for Reusing TLM Assertions and Testbenches at RTL. In Proceedings of "ACM/IEEE Design, Automation and Test in Europe (DATE)", Munich, Germany, 06-10 March, 2006, pp. 1-6. [C52] N. Bombieri, F. Fummi, D. Quaglia, TLM/Network Design Space Exploration for Networked Embedded Systems. In Proceedings of "ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)", Seoul, Corea, 22-25 October, 2006, pp. 58-63. [C53] N. Bombieri, F. Fummi, G. Pravadelli, Functional Verification of Networked Embedded Systems. In Proceedings of "ACM/IEEE International Symposium on Quality Electronic Design (ISQED)", San Jose, CA, USA, 21-23 March, 2005, pp. 321-326. [C54] N. Bombieri, A. Fedeli, F. Fummi, On the Property-based Verification in SoC Design Flow Founded on Transaction Level Modeling. In Proceedings of "ACM/IEEE International Conference on Formal Methods and Models for Codesigns (MEMOCODE)", Verona, Italy, 11-14 July, 2005, pp. 239-240. [C55] N. Bombieri, F. Fummi, G. Pravadelli, At-Speed Functional Verification of Programmable Devices. In Proceedings of "IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT)", Cannes, France, 11-13 October, 2004, pp. 386-394. Books [B1] N. Bombieri, M. Poncino, G. Pravadelli. Smart Systems Integration and Simulation. Springer International Publishing. 2016. ISBN: 978-3-319-27390-7. Book chapters [BC1] F. Busato, N. Bombieri. “Graph Algorithms on GPUs” in Advances in GPU Research and Practice. Ed. H. Sarbazi Azad. Elsevier inc. In printing, Jan. 2017. ISBN: 978-0-12-803738-6. N. Bombieri, F.Fummi, G.Pravadelli “Hardware Design and Simulation for Verification” in M. Bernardo, A. Cimatti – Formal Methods for Hardware Verification. Springer, 2006, Pp. 1--29.